Article

(2004) Efficient Scalable VLSI Architecture for Montgomery Inversion in GF(p). Integration, the VLSI Journal, 37 (2). pp. 103-120. ISSN 0167-9260

Conference or Workshop Item

(2003) Efficient Scalable Hardware Architecture for Montgomery Inverse Computation in GF(P). In: IEEE Workshop on Signal Processing Systems (SIPS’03), August 27-29, 2003, Seoul, Korea.

(2002) Scalable VLSI Architecture for GF(p) Montgomery Modular Inverse Computation. In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI’02, April 25-26, 2002, Pittsburgh, Pennsylvania, USA.

(2002) Scalable and Unified Hardware to Compute Montgomery Inverse in GF(p) and GF(2n). In: Workshop on Cryptographic Hardware and Embedded Systems CHES’2002, August 13-15, 2002, San Francisco Bay (Redwood City), USA.