Computer Engineering

(2007) Algorithm for Parallel Inverse Halftoning using Partitioning of Look-Up Table (LUT). IEEE Symposium on Circuits and Systems (ISCAS). (Submitted)

(2005) Parallel Algorithm for Hardware Implementation of Inverse Halftoning. IEEE Symposium on Circuits and Systems (ISCAS).

(1992) INTEGRATING UAHPL-DA SYSTEMS WITH VLSI DESIGN TOOLS TO SUPPORT VLSI DA COURSES. IEEE TRANSACTIONS ON EDUCATION 35 (4): 321-330 NOV 1992 (JZ981). ISSN 0018-9359

(2006) Efficient static compaction techniques for sequential circuits based on reverse-order restoration and test relaxation. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 25 (11): 2556-2564 NOV 2006.

(2006) A Parallel Algorithm for Inverse Halftoning and its Hardware. Arabian Journal of Science and Engineering (AJSE) Submitted Dec 2006.

(2003) Fuzzy simulated evolution algorithm for VLSI cell placement. COMPUTERS & INDUSTRIAL ENGINEERING 44 (2): 227-247 FEB 2003. ISSN 0360-8352

(2006) Evolutionary algorithms for VLSI multi-objective netlist partitioning. ENGINEERING APPLICATIONS OF ARTIFICIAL INTELLIGENCE 19 (3): 257-268 APR 2006. ISSN 0952-1976