Parallel Algorithm for Hardware Implementation of Inverse Halftoning

(2005) Parallel Algorithm for Hardware Implementation of Inverse Halftoning. IEEE Symposium on Circuits and Systems (ISCAS).

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Abstract

A Parallel algorithm and its hardware implementation of Inverse Halftone operation is proposed in this paper. The algorithm is based on Lookup Tables from which the inverse halftone value of a pixel is directly determined using a pattern of pixels. A method has been developed that allows accessing more than one value from the lookup table at any time. The lookup table is divided into smaller lookup tables, such that each pattern selected at any time goes to a separate smaller lookup table. The 15-pixel parallel version of the algorithm was tested on sample images and a simple and effective method has been used to overcome quality degradation due to pixel loss in the proposed algorithm. It can provide at least 4 times decrease in lookup table size when compared with serial lookup table method implemented multiple times for same number of pixels.

Item Type: Article
Subjects: Computer
Department: College Of Computer Sciences and Engineering > Computer Engineering Dept
Depositing User: UMAIR FAROOQ SIDDIQI
Date Deposited: 08 Dec 2007 07:48
Last Modified: 01 Nov 2019 13:22
URI: https://eprints.kfupm.edu.sa/id/eprint/60