A CMOS CELL FOR PARALLELLY LOADABLE COUNTERS

A CMOS CELL FOR PARALLELLY LOADABLE COUNTERS. INTERNATIONAL JOURNAL OF ELECTRONICS, 62 (6): 867-871 NOV 1987.

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Abstract

Abstract A CMOS flip-flop cell which can be used in counters is designed. SPICE model, the transient response and the CMOS layout are presented. When used in counters, the flip-flop can be loaded to initialize the count. Keywords: CMOS, counters, computer aided design, SPICE, complementary metal oxide semiconductors

Item Type: Article
Subjects: Computer
Department: College of Computing and Mathematics > Computer Engineering
Depositing User: AbdulRahman
Date Deposited: 11 Mar 2008 07:35
Last Modified: 01 Nov 2019 13:23
URI: https://eprints.kfupm.edu.sa/id/eprint/304