(2001) A geometric-primitives-based compression scheme for testingsystems-on-a-chip. VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001, 1.

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Abstract

The increasing complexity of systems-on-a-chip with the accompanied increase in their test data size has made the need for test data reduction imperative. In this paper we introduce a novel and very efficient lossless compression technique for testing systems-on-a-chip based on geometric shapes. The technique exploits reordering of test vectors to minimize the number of shapes needed to encode the test data. The effectiveness of the technique in achieving high compression ratio is demonstrated on the largest ISCAS85 and full-scanned versions of ISCAS89 benchmark circuits. In this paper, it is assumed that an embedded core will be used to execute the decompression algorithm and decompress the test data

Item Type:	Article
Subjects:	Computer
Department:	College of Computing and Mathematics > Mathematics
Depositing User:	Mr. Admin Admin
Date Deposited:	24 Jun 2008 13:26
Last Modified:	01 Nov 2019 14:04
URI:	http://eprints.kfupm.edu.sa/id/eprint/14209