Improving Cryptographic Architectures by Adopting Efficient Adders in their Modular Multiplication Hardware VLSI

(2003) Improving Cryptographic Architectures by Adopting Efficient Adders in their Modular Multiplication Hardware VLSI. In: The 9th Annual Gulf Internet Symposium, October 13-15, 2003, Khobar, Saudi Arabia.

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Abstract

This work studies and compares different modular multiplication algorithms with emphases on the underlying binary adders. The method of interleaving multiplication and reduction, Montgomery’s method, and high-radix method were studied using the carry-save adder, carry-lookahead adder and carry-skip adder. Two recent implementations of the first two methods were modeled and synthesized for practical analysis. A modular multiplier following Koc’s implementation [6] based on carry-save adders and the use of carry-skip adders in the final addition step is expected to be of a fast speed with fair area requirement and reduced power consumption.

Item Type: Conference or Workshop Item (Paper)
Subjects: Math
Systems
Computer
Electrical
Divisions: College Of Computer Sciences and Engineering > Computer Engineering Dept
Depositing User: ADNAN ABDU GUTUB (gutub
Date Deposited: 17 May 2008 08:31
Last Modified: 01 Nov 2019 16:26
URI: http://eprints.kfupm.edu.sa/id/eprint/1299