A CMOS Fully balanced four-terminal floating nullor

(2002) A CMOS Fully balanced four-terminal floating nullor. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 49 (4). pp. 413-424.

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This paper presents design and implementation of a CMOS fully balanced realization of the four-terminal floating nullor (FTFN). The proposed fully balanced FTFN (FBFTFN) is an essential building block for implementing fully balanced architectures of both voltage and current-mode analog CMOS integrated circuits (ICs). A low-power class AB CMOS realization of the proposed circuit is fabricated in a 1.2-μm technology. The proposed circuit has numerous applications. Several applications including fully balanced amplifiers, filters, and sinusoidal oscillators are presented. All proposed design techniques and circuits are experimentally verified

Item Type: Article
Subjects: Electrical
Department: College of Engineering and Physics > Electrical Engineering
Depositing User: Obaid-Ur-Rehman Khattak
Date Deposited: 30 Mar 2008 08:13
Last Modified: 01 Nov 2019 13:25
URI: http://eprints.kfupm.edu.sa/id/eprint/847