A CMOS highly linear channel select filter for 3G multi-standard integrated wireless receivers

(2002) A CMOS highly linear channel select filter for 3G multi-standard integrated wireless receivers. IEEE Journal of Solid State Circuits, 37 (1). pp. 27-37.

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Abstract

A new approach for designing digitally programmable CMOS integrated baseband filters is presented. The proposed technique provides a systematic method for designing filters exhibiting high linearity and low power. A sixth-order Butterworth low-pass filter with 14-bit bandwidth tuning range is designed for implementing the baseband channel-select filter in an integrated multistandard wireless receiver. The filter consumes a current of 2.25 mA from a 2.7-V supply and occupies an area of 1.25 mm2 in a 0.5-μm chip. The proposed filter design achieves high spurious free dynamic ranges (SFDRs) of 92 dB for PDC (IS-54), 89 dB for GSM, 84 dB for IS-95, and 80 dB for WCDMA

Item Type: Article
Subjects: Electrical
Divisions: College Of Engineering Sciences > Electrical Engineering Dept
Depositing User: Obaid-Ur-Rehman Khattak
Date Deposited: 30 Mar 2008 11:13
Last Modified: 01 Nov 2019 16:25
URI: http://eprints.kfupm.edu.sa/id/eprint/846

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  • A CMOS highly linear channel select filter for 3G multi-standard integrated wireless receivers. (deposited 30 Mar 2008 11:13) [Currently Displayed]