(2005) Efficient Static Compaction Techniques for Sequential Circuits based on Reverse Order Restoration Based and Test Relaxation. In: Proceedings of the 14th Asian Test Symposium (ATS ’05), Kolkata, India.

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Abstract

Abstract In this paper we present efficient Reverse Order Restoration (ROR) based static test compaction techniques for synchronous sequential circuits. Unlike previous ROR techniques that rely on vector-by-vector fault-simulation based restoration of test subsequences, our technique restores test sequences based on efficient test relaxation. The restored test subsequence can be either concatenated to the compacted test sequence, as in previous approaches, or merged with it. Furthermore, it allows the removal of redundant vectors from the restored subsequences using State Traversal technique and incorporates schemes for increasing the fault coverage of restored test subsequences to achieve an overall higher level of compaction. In addition, test relaxation is used to take ROR out of saturation. Experimental results demonstrate the effectiveness of the proposed techniques. Keywords: Static Compaction, Test Relaxation.

Item Type:	Conference or Workshop Item (Other)
Subjects:	Computer
Department:	College of Computing and Mathematics > Computer Engineering
Depositing User:	AbdulRahman
Date Deposited:	24 Feb 2008 13:07
Last Modified:	01 Nov 2019 13:22
URI:	http://eprints.kfupm.edu.sa/id/eprint/80