Two Analytical Models for Evaluating Performance of Gigabit Ethernet Hosts with Finite Buffer

(2006) Two Analytical Models for Evaluating Performance of Gigabit Ethernet Hosts with Finite Buffer. International Journal of Electronics and Communications, 60 (7). pp. 545-556.

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Abstract

Two analytical models are developed to study the impact of interrupt overhead on operating system performance of network hosts with limited-size or finite buffer. Under heavy network traffic such as that of Gigabit Ethernet, the system performance will be negatively affected due to interrupt overhead caused by incoming traffic. In particular, packet loss, excessive latency and significant degradation in system throughput can be experienced. Also, user applications may livelock as the CPU power is mostly consumed by interrupt handling and protocol processing. In this paper, we present and compare two analytical models that capture host behavior and evaluate its performance. The first model is based on Markov processes and queueing theory, while the second, which is more accurate but more complex, is a pure Markov process. The models yield equations for a number of important system performance metrics. These performance metrics include throughput, latency, packet loss, stability condition, CPU utilizations of interrupt handling and protocol processing, and CPU availability for user applications. Both models yield closed-form solutions and equations that are either mathematically equivalent or very closely matching. Our analysis yields insight into understanding and predicting the impact of system and network choices on the performance of interrupt-driven systems when subjected to light and heavy network loads. More importantly, our analytical work can also be valuable in improving host performance. The paper gives guidelines and recommendations to address design and implementation issues. Simulation and reported experimental results show that our analytical models are valid and give a good approximation.

Item Type: Article
Uncontrolled Keywords: High-Speed Networks, Operating Systems, Interrupts, Receive Livelock, Modeling and Analysis.
Subjects: Computer
Department: College of Computing and Mathematics > Information and Computer Science
Depositing User: KHALED HAMED SALAH
Date Deposited: 25 Mar 2008 08:09
Last Modified: 01 Nov 2019 13:25
URI: http://eprints.kfupm.edu.sa/id/eprint/713