Back-end design of a formal high level synthesis system

(1993) Back-end design of a formal high level synthesis system. Masters thesis, Advisor: Prof. Sadiq M. Sait, Co-Advisors: Dr. Khalid M. Elleithy and Dr. Samir Abdul Jauwad. KFUPM.

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Abstract

A complete design and implementation of a cell library has been accomplished in this work. This cell library supports a formal high level synthesis framework. The library contains the logic level models of all primitive functions of a Realization Specification Language (RSL). Modular design methodology is employed to support the expandability of basic cells. Examples of a formal adder, multiplier, inner-product and matrix-matrix multiplier are presented. Advisor: Prof. Sadiq M. Sait, Co-Advisors: Dr. Khalid M. Elleithy and Dr. Samir Abdul Jauwad.

Item Type: Thesis (Masters)
Subjects: Computer
Department: College Of Computer Sciences and Engineering > Computer Engineering Dept
Depositing User: Mr. Admin Admin
Date Deposited: 16 Sep 2007 11:56
Last Modified: 01 Nov 2019 13:21
URI: https://eprints.kfupm.edu.sa/id/eprint/19