Integration, the VLSI Journal, Vol. 37, No. 2, pages 103-120, May 2004.

Efficient Scalable VLSI Architecture for Montgomery Inversion in GF(p)

Adnan Abdul-Aziz Gutub^a,* and Alexandre Ferreira Tenca^b

^a Computer Engineering Department, King Fahd University of Petrolium & Minerals, Dhahran 31261, Saudi Arabia

^b Electrical and Computer Engineering Department, Oregon State University, Corvallis, Oregon 97331 USA.

Abstract

The multiplicative inversion operation is a fundamental computation in several cryptographic applications. In this work, we propose a scalable VLSI hardware to compute the Montgomery modular inverse in GF(p). We suggest a new correction phase for a previously proposed almost Montgomery inverse algorithm to calculate the inversion in hardware. We also propose an efficient hardware algorithm to compute the inverse by multi-bit shifting method. The intended VLSI hardware is scalable, which means that a fixed-area module can handle operands of any size. The word-size, which the module operates, can be selected based on the area and performance requirements. The upper limit on the operand precision is dictated only by the available memory to store the operands and internal results. The scalable module is in principle capable of performing infinite-precision Montgomery inverse computation of an integer, modulo a prime number. This scalable hardware is compared with a previously proposed fixed (fully parallel) design showing very attractive results.

Keywords: Montgomery inverse, Elliptic curve cryptography, Scalable hardware design