Merging GF(p) Elliptic Curve Point Adding and Doubling on Pipelined VLSI Cryptographic ASIC Architecture

(2006) Merging GF(p) Elliptic Curve Point Adding and Doubling on Pipelined VLSI Cryptographic ASIC Architecture. International Journal of Computer Science and Network Security (IJCSNS), 6 (3A). pp. 44-52. ISSN 1738-7906

[img] HTML (Abstract)
h.htm

Download (60kB)
[img]
Preview
PDF (Paper)
H.pdf

Download (234kB) | Preview
Official URL: http://ijcsns.org/

Abstract

This paper merges between elliptic curve addition presents a modified processor architecture for Elliptic Curve Cryptography computations in Galois Fields GF(p). The architecture incorporates the methodology of pipelining to utilize the benefit of both parallel and serial implementations. It allows the exploitation of the inherited independency that exists in elliptic curve point addition and doubling operations using a single pipelined core. The processor architecture showed attraction because of its improvement over many parallel and serial implementations of elliptic curve crypto-systems. It proved to be efficient having better performance with regard to area, speed, and power consumption.

Item Type: Article
Subjects: Math
Computer
Electrical
Divisions: College Of Computer Sciences and Engineering > Computer Engineering Dept
Depositing User: ADNAN ABDU GUTUB (gutub
Date Deposited: 01 Mar 2008 16:14
Last Modified: 01 Nov 2019 16:22
URI: http://eprints.kfupm.edu.sa/id/eprint/174