Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering

(2007) Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering. IET Computers & Digital Techniques, 1 (4). pp. 364-368.

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Abstract

Test compaction is an effective technique for reducing test data volume and test application time. In this paper, we present a new static test compaction technique based on test vector decomposition and clustering. Test vectors are decomposed and clustered for faults in an increasing order of faults detection count. This clustering order gives more degree of freedom and results in better compaction. Experimental results demonstrate the effectiveness of the proposed approach in achieving higher compaction in a much more efficient CPU time than previous clustering-based test compaction approaches.

Item Type: Article
Subjects: Computer
Department: College of Computing and Mathematics > Computer Engineering
Depositing User: AIMAN HELMI EL-MALEH
Date Deposited: 29 Feb 2008 19:43
Last Modified: 01 Nov 2019 13:22
URI: https://eprints.kfupm.edu.sa/id/eprint/158