Designing ASICs with UAHPL

(1995) Designing ASICs with UAHPL. Circuits and Devices Magazine, IEEE, 11.

[img]
Preview
PDF
14748_1.pdf

Download (18kB) | Preview
[img] Microsoft Word
14748_2.doc

Download (26kB)

Abstract

Discussed the progress made in putting together a UAHPL based design automation system using software tools developed locally and in U.S. universities. The UAHPL language is used as the front-end specification medium because of its close relation to hardware implementation issues. The system is modular and technology independent so that future extensions and specific implementation issues can be added and modified. The work carried out so far has targeted semicustom design and standard cell methodologies. The front-end of the system, up to the netlist, is independent of technology and architecture. The output of this stage can be conveniently mapped to programmable devices (PLDs) and field programmable gate arrays (FPGAs)

Item Type: Article
Subjects: Computer
Department: College of Computing and Mathematics > Computer Engineering
Depositing User: Mr. Admin Admin
Date Deposited: 24 Jun 2008 13:47
Last Modified: 01 Nov 2019 14:07
URI: https://eprints.kfupm.edu.sa/id/eprint/14748