Fast elliptic curve cryptographic processor architecture based on three parallel GF(2/sup k/) bit level pipelined digit serial multipliers

(2003) Fast elliptic curve cryptographic processor architecture based on three parallel GF(2/sup k/) bit level pipelined digit serial multipliers. Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International conference, 1.

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Abstract

Unusual processor architecture for elliptic curve encryption is proposed in this paper. The architecture exploits projective coordinates (x=X/Z, y=Y/Z) to convert GF(2/sup k/) division needed in elliptic point operations into several multiplication steps. The processor has three GF(2/sup k/) multipliers implemented using bit-level pipelined digit serial computation. It is shown that this results in a faster operation than using fully parallel multipliers with the added advantage of requiring less area. The proposed architecture is a serious contender for implementing data security systems based on elliptic curve cryptography.

Item Type: Article
Subjects: Computer
Divisions: College Of Computer Sciences and Engineering > Computer Engineering Dept
Depositing User: Mr. Admin Admin
Date Deposited: 24 Jun 2008 16:22
Last Modified: 01 Nov 2019 17:04
URI: http://eprints.kfupm.edu.sa/id/eprint/14101