# Buck Converters for Low Power Applications

Buck Converters for Low Power Applications. Masters thesis, King Fahd University of Petroleum and Minerals.

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Consumer electronics has no doubt entered every aspect of modern life. Scaling of CMOS technologies has provided the platform to serve the ever more increasing demands of consumers: more functionality, higher performance, longer battery lifetime all at lower prices and smaller sizes. Many portable devices have Buck converters that adapt the higher battery or supply voltage to the lower voltage levels demanded by digital circuits. This thesis explores two topics related to Buck converters. First: the design of buck converters requires the sizing of switches and passive components. Selecting a suitbale design point requires the ability to evaluate the performance at the design point. In this thesis we propose an automated algorithm (called MNA-SS-REDOX) for state space generation and performance evaluation of DC-DC converters (in general). The algorithm is applied to several types of buck converters and compared against simulation results from SPICE found to be in good agreement with the simulation results. The algorithm also sets the stage for an automated optimizer to be used for sizing of components. Second: the output range over which the buck converter exhibits certain efficiency directly affects the battery lifetime. Portable devices spend considerable amount of time in low power modes. We propose a hybrid buck converter power stage that allows serving of a wide range of loads (100$\mu$ - 1A) i.e. a range of 10000. The power stage is formed of a switched capacitor power stage and an inductive power stage. The output voltages provided by this converter are in the range 0.7 -- 1.4V with a peak efficiency of 82\%.