(1995) Timing Driven Genetic Algorithm for Placement. In: IEEE Phoenix Conference on Computers and Communications, IPCCC.
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Abstract
In this paper we present a timing -driven placer for standard-cell IC design. The placement algorithm follows the genetic pradigm. At early generations, the search is biased towards solutions with superior timing characteristics. As the algorithm starts converging towards generations with acceptable delay properties, the objective is dynamically adjusted towards optimizing area and routability. Experiments with test circuits demonstrate delay performance improvement by upto 20%. Without any noticeable loss in solution quality, sizebale reduction in runtime is obtained when population size is allowed to decrease in a controlled manner whenever the search hits a plateau.
| Item Type: | Conference or Workshop Item (Other) |
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| Subjects: | Computer |
| Department: | College of Computing and Mathematics > Computer Engineering |
| Depositing User: | AbdulRahman |
| Date Deposited: | 26 Feb 2008 12:18 |
| Last Modified: | 01 Nov 2019 13:22 |
| URI: | http://eprints.kfupm.edu.sa/id/eprint/131 |