In this section

    Design of a Cell Library for Formal High-level Synthesis

    (1994) Design of a Cell Library for Formal High-level Synthesis. In: IEEE Melecon'94.

    [img]
    Preview
    		 PDF
    Sait_EC_April1994_2.pdf
    Download (431kB) | Preview

    Abstract

    In this paper we present a complete design and implementation of a CMOS cell library which supports a formal high level synthesis framework. The library contains the logic level models and VLSI layouts of all primitive functions of the Realization Specification Language (RSL) [1] as well as some commonly used functions which are also built using these basic functions. Modular design methodology is employed to support the expandibility of the basic cells. Example of a formal matrix-matrix multiplayer is presented to illustrate the application of the cell library.

    Item Type: Conference or Workshop Item (Other)
    Subjects: Computer
    Department: College of Computing and Mathematics > Computer Engineering
    Depositing User: AbdulRahman
    Date Deposited: 26 Feb 2008 11:48
    Last Modified: 01 Nov 2019 13:22
    URI: http://eprints.kfupm.edu.sa/id/eprint/128