(1991) A State Machine Synthesizer with Weinberger Arrays. In: The IEEE Pacific RIM Conference, Victoria, Canada.
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Abstract
In this paper we desribe the development of a digital circuit synthesis program. The program accpets the transition table of a state machine and returns equations for an implementation that assumes a sum-of-product next-state and output functions. From the equations for the next-state and output functions, an nMOS VLSI layout for Weinberger araay (WA) is generated. D flip-flops are assumed for memory calculations can be avoided and layout are generated automatically from state table descriptions.
| Item Type: | Conference or Workshop Item (Other) |
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| Subjects: | Computer |
| Department: | College of Computing and Mathematics > Computer Engineering |
| Depositing User: | AbdulRahman |
| Date Deposited: | 26 Feb 2008 11:15 |
| Last Modified: | 01 Nov 2019 13:22 |
| URI: | http://eprints.kfupm.edu.sa/id/eprint/124 |