Hardware Implementations of GF(2^m) Arithmetic using Normal Basis

(2006) Hardware Implementations of GF(2^m) Arithmetic using Normal Basis. Journal of Applied Sciences, 6 (6). pp. 1362-1372.

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This study presents a survey of algorithms used in field arithmetic over GF (2m) using normal basis and their hardware implementations. These include the following arithmetic field operations: addition, squaring, multiplication and inversion. This study shows that the type II Sunar-Koc multiplier is the best multiplier with a hardware complexity of m2 AND gates + XOR gates and a time complexity of TA+ (1+ l log2 (m) l )Tx. The study also show that the Itoh-Tsujii inversion algorithm was the best inverter and it requires almost log2 (m-1) multiplications.

Item Type: Article
Subjects: Computer
Department: College of Computing and Mathematics > Computer Engineering
Depositing User: Obaid-Ur-Rehman Khattak
Date Deposited: 28 Apr 2008 12:23
Last Modified: 01 Nov 2019 13:26
URI: https://eprints.kfupm.edu.sa/id/eprint/1238