(1996) A Generic DFT Approach for Pattern Sensitive Faults in Word-Oriented Memories. IEE Proceedings E on Computers and Digital Techniques, 143 (3). pp. 199-202.
Full text not available from this repository.Abstract
The testability problem of word-oriented memories (WOMs) for pattern sensitive faults is addressed. A novel design for testability (DFT) strategy allows efficient built-in self-testing (BIST) of WOMs. By proper selection of the memory array tiling scheme, it is possible to implement O(√n) BIST algorithms which test WOMs for various types of neighbourhood pattern sensitive faults (NPSFs). The inputs of the column decoders are modified to allow parallel writing into multiple words, and coincidence comparators are added to allow parallel verification of row data with minimal effect on chip area and performance
Item Type: | Article |
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Subjects: | Computer |
Department: | College of Computing and Mathematics > Computer Engineering |
Depositing User: | Obaid-Ur-Rehman Khattak |
Date Deposited: | 28 Apr 2008 12:33 |
Last Modified: | 01 Nov 2019 13:26 |
URI: | http://eprints.kfupm.edu.sa/id/eprint/1236 |