(1998) Tabu Search Based Circuit Optimization. In: Great Lakes Symposium on VLSI, GLSVLSI'98, SW Louisiana.
|
PDF
Sait_GLS_February1998.pdf Download (186kB) | Preview |
Abstract
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is for- mulated as a constrained combinatorial optimization problem and solved using an tabu search algorithm. Only gates on the critical sensitizable paths are consid- ered for optimization. Such a strategy leads to sizable circuit speed improvement with minimum increase in the overall circuit capacitance. Compared to earlier approaches, the presented technique produces circuits with remarkable increase in speed (greater than 20%) for very small increase in overall circuit capacitance (less than 3%). Keywords: Tabu Search, Circuit Optimization, Search Algorithms, CMOS/BiCMOS, Mixed Technologies, Critical Path, False Path.
Item Type: | Conference or Workshop Item (Other) |
---|---|
Subjects: | Computer |
Department: | College of Computing and Mathematics > Computer Engineering |
Depositing User: | AbdulRahman |
Date Deposited: | 26 Feb 2008 05:20 |
Last Modified: | 01 Nov 2019 13:22 |
URI: | http://eprints.kfupm.edu.sa/id/eprint/121 |