(2003) GENERAL ITERATIVE HEURISTICS FOR VLSI MULTIOBJECTIVE PARTITIONING. In: IEEE International Symposium on Circuits and Systems'', Bangkok, Thailand.
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Abstract
The problem of partitioning appears in several areas ranging from VLSI parallel programming, to molecular biology. The intrest in finding an optimal partition especally in VLSI has been a hot issue in recent years. IN VLSI circuit partitioning with multiple objectives which include power, delay and area, in addition to minimum cut is in vogue. In this paper, we engineer two iteratives heuristics for the optimization of VLSI netlist bi-Partitioning. Theses heuristics are based on Genetic Algorithms (GA's) and Tabu Search (TS) and incorporate fuzzy rules in order to handle the multi-obejective cost function. Both heuristics are applied to ISCAS-85/89 benchmark circuits and experimental results are reported and compared.
| Item Type: | Conference or Workshop Item (Other) |
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| Subjects: | Computer |
| Department: | College of Computing and Mathematics > Computer Engineering |
| Depositing User: | AbdulRahman |
| Date Deposited: | 25 Feb 2008 07:00 |
| Last Modified: | 01 Nov 2019 13:22 |
| URI: | http://eprints.kfupm.edu.sa/id/eprint/100 |