Items where Author is "Osais, Yahya E."
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Number of items: 4.
Article
(2003) Test Vector Decomposition Based Static Compaction Algorithms for Combinational Circuits. ACM Transactions on Design Automation of Electronic Systems, 8 (4). pp. 430-459.
(2004) On Test Vector Reordering for Combinational Circuits. 16th International Conference on Microelectronics. 772 -775.
(2001) A Retiming-Based Test Pattern Generator Design for Built-In Self Test of Data Path Architectures. Int. Symp. on Circuits and Systems. pp. 550-553.
(2004) A Class-based Clustering Static Compaction Technique for Combinational Circuits. 16th International Conference on Microelectronics. pp. 522-525.