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Items where Author is "Benten, M. S."

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Number of items: 12.

Article

Sait, Sadiq M. and Benten, M. S. and Khan, A. M. T. DESIGNING ASICS WITH UAHPL. IEEE CIRCUITS AND DEVICES MAGAZINE 11 (2): 14-24 MAR 1995.

Benten, M. S. and Sait, Sadiq M. GAP - A GENETIC ALGORITHM APPROACH TO OPTIMIZE 2-BIT DECODER PLAS. INTERNATIONAL JOURNAL OF ELECTRONICS 76 (1): 99-106 JAN 1994.

Benten, M. S. and Sait, Sadiq M. GENETIC SCHEDULING OF TASK GRAPHS. INTERNATIONAL JOURNAL OF ELECTRONICS 77 (4): 401-415 OCT 1994.

Sait, Sadiq M. and Ali, S and Benten, M. S. Scheduling and allocation in high-level synthesis using stochastic techniques. MICROELECTRONICS JOURNAL 27 (8): 693-712 NOV 1996.

Sait, Sadiq M. and Ali, S and Benten, M. S. Scheduling and allocation in high-level synthesis using stochastic techniques. MICROELECTRONICS JOURNAL 27 (8): 693-712 NOV 1996.

Conference or Workshop Item

Sait, Sadiq M. and Youssef, H. and Tanvir, S. and Benten, M. S. (1995) Timing Influenced Force Directed Floorplanning. In: European Design Automation Conference with Euro-VHDL, Euro-DAC'95, Brighton.

Sait, Sadiq M. and Youssef, H. and Tanvir, S. and Benten, M. S. (1995) Timing Influenced General-Cell Genetic Floorplanner. In: Asia and South-Pacific Design Automation Conference, ASP-DAC'95, Japan.

Al-Sukhni, H. F. and Sait, Sadiq M. and Benten, M. S. (1995) Loop based scheduling for high level synthesis. In: IEEE Phoenix Conference on Computers and Communications, IPCCC.

Youssef, H. and Sait, Sadiq M. and Nassar, K. and Benten, M. S. (1995) Performance Driven Standard-cell Placement Using the Genetic Algorithm. In: Fifth Great Lakes Symposium on VLSI, GLSVLSI'95, Buffalo, USA.

Sait, Sadiq M. and Youssef, H. and Nassar, K. and Benten, M. S. (1995) Timing Driven Genetic Algorithm for Placement. In: IEEE Phoenix Conference on Computers and Communications, IPCCC.

Sait, Sadiq M. and Benten, M. S. and Asjad, M. T. K. (1994) ASIC Design with AHPL. In: IEEE Melecon'94.

Ali, S. and Sait, Sadiq M. and Benten, M. S. (1994) GSA: Scheduling and Allocation using Genetic Algorithm. In: European Design Automation Conference with Euro-VHDL, Euro-DAC'94, Grenoble.

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