Sait, Sadiq M. and Abd-El-Barr, Mostafa and Al-Saiari, Uthman and Bambang, Sarif (2003) Digital Circuit Design Through Simulated Evolution (SimE). In: IEEE Congress on Evolutionary Computation (CEC),, Canberra, Australia.
Abstract- In this paper, the use of Simulated Evolution (SimE) Algorithm in the design of digital logic circuits is proposed. SimE algorithm consists of three steps: evaluation, selection and allocation. Two goodness measures are designed to guide the selection and allocation operations of SimE. Area, power and delay are considered in the optimization of circuits. Results obtained by SimE algorithm are compared to those obtained by Genetic Algorithm (CA).
|Item Type:||Conference or Workshop Item (Other)|
|Date:||01 December 2003|
|Divisions:||College Of Computer Sciences and Engineering > Computer Engineering Dept|
|Creators:||Sait, Sadiq M. and Abd-El-Barr, Mostafa and Al-Saiari, Uthman and Bambang, Sarif|
|Email:||firstname.lastname@example.org, UNSPECIFIED, UNSPECIFIED, UNSPECIFIED|
|Deposited On:||25 Feb 2008 09:07|
|Last Modified:||12 Apr 2011 13:06|
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