KFUPM ePrints

A CMOS Fully balanced four-terminal floating nullor

Al-Zaher, H. and Ismail, M. (2002) A CMOS Fully balanced four-terminal floating nullor. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 49 (4). pp. 413-424.

Full text not available from this repository.


This paper presents design and implementation of a CMOS fully balanced realization of the four-terminal floating nullor (FTFN). The proposed fully balanced FTFN (FBFTFN) is an essential building block for implementing fully balanced architectures of both voltage and current-mode analog CMOS integrated circuits (ICs). A low-power class AB CMOS realization of the proposed circuit is fabricated in a 1.2-μm technology. The proposed circuit has numerous applications. Several applications including fully balanced amplifiers, filters, and sinusoidal oscillators are presented. All proposed design techniques and circuits are experimentally verified

Item Type:Article
Date:April 2002
Date Type:Publication
Divisions:College Of Engineering Sciences > Electrical Engineering Dept
Creators:Al-Zaher, H. and Ismail, M.
Email:alzaherh@kfupm.edu.sa, UNSPECIFIED
ID Code:847
Deposited By:Obaid-Ur-Rehman Khattak
Deposited On:30 Mar 2008 11:13
Last Modified:12 Apr 2011 13:06

Repository Staff Only: item control page