Sait, Sadiq M. and Youssef, H. and El-Maleh, Aiman H. (2001) Iterative Heuristics for Timing & low power VLSI standard cell placement. In: Unknown. (Unpublished)
| PDF 106Kb |
| Item Type: | Conference or Workshop Item (Other) |
|---|---|
| Date: | April 2001 |
| Subjects: | Computer |
| Divisions: | College Of Computer Sciences and Engineering > Computer Engineering Dept |
| Creators: | Sait, Sadiq M. and Youssef, H. and El-Maleh, Aiman H. |
| Email: | sadiq@kfupm.edu.sa, youssef@kfupm.edu.sa, aimane@kfupm.edu.sa |
| ID Code: | 200 |
| Deposited By: | AbdulRahman |
| Deposited On: | 08 Mar 2008 08:17 |
| Last Modified: | 12 Apr 2011 13:06 |
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