International Journal of Computer Science and Network Security (IJCSNS), Vol.6, No.3A, Pages: 44 52, March 2006.

Merging GF(p) Elliptic Curve Point Adding and Doubling on Pipelined VLSI Cryptographic ASIC Architecture

Adnan Abdul-Aziz Gutub

gutub@kfupm.edu.sa

King Fahd University of Petroleum and Minerals, Dhahran 31261, Saudi Arabia


 

 

This paper merges between elliptic curve addition presents a modified processor architecture for Elliptic Curve Cryptography computations in Galois Fields GF(p). The architecture incorporates the methodology of pipelining to utilize the benefit of both parallel and serial implementations. It allows the exploitation of the inherited independency that exists in elliptic curve point addition and doubling operations using a single pipelined core. The processor architecture showed attraction because of its improvement over many parallel and serial implementations of elliptic curve crypto-systems. It proved to be efficient having better performance with regard to area, speed, and power consumption.

 

Key words:

Elliptic Curve Cryptography, Pipelined Crypto Architectures, Crypto Arithmetic Hardware, Efficient crypto ASIC Processor.