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Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering

El-Maleh, Aiman H. and Khursheed, S. Saqib (2006) Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering. IEEE Int. Design and Test Workshop.

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Abstract

Test compaction is an effective technique for reducing test data volume and test application time. In this paper, we present a new static test compaction algorithm based on test vector decomposition and clustering. Test vectors are decomposed and clustered in an increasing order of faults detection count. This clustering order gives more degree of freedom and results in better compaction. Experimental results demonstrate the effectiveness of the proposed approach in achieving higher compaction in a much more efficient CPU time than previous clustering-based test compaction approaches.



Item Type:Article
Date:19 November 2006
Date Type:Publication
Subjects:Computer
Divisions:College Of Computer Sciences and Engineering > Computer Engineering Dept
Creators:El-Maleh, Aiman H. and Khursheed, S. Saqib
Email:aimane@kfupm.edu.sa, saqibs@kfupm.edu.sa
ID Code:157
Deposited By:AIMAN HELMI EL-MALEH
Deposited On:29 Feb 2008 17:29
Last Modified:12 Apr 2011 13:06

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