KFUPM ePrints

Performance driven standard-cell placement using the geneticalgorithm

Youssef, H. and Sait, Sadiq M. and Nassar, K. and Benten, M.S.T. (1995) Performance driven standard-cell placement using the geneticalgorithm. VLSI, 1995. Proceedings., Fifth Great Lakes Symposium on, 1.

[img]
Preview
PDF
18Kb
[img]Microsoft Word
26Kb

Abstract

Current placement systems attempt to optimize several objectives, namely area, connection length, and timing performance. In this paper we present a timing-driven placer for standard-cell IC design. The placement algorithm follows the genetic paradigm. Besides optimizing for area and wire length, the placer minimizes the propagation delays on a predicted set of critical paths. The paths are enumerated using a new approach based on the notion of -criticality. Experiments with test circuits demonstrate delay performance improvement by up to 20%



Item Type:Article
Date:March 1995
Date Type:Publication
Subjects:Computer
Divisions:College Of Computer Sciences and Engineering > Computer Engineering Dept
Creators:Youssef, H. and Sait, Sadiq M. and Nassar, K. and Benten, M.S.T.
Email:UNSPECIFIED, sadiq@kfupm.edu.sa, UNSPECIFIED, UNSPECIFIED
ID Code:14832
Deposited By:KFUPM ePrints Admin
Deposited On:24 Jun 2008 16:51
Last Modified:12 Apr 2011 13:17

Repository Staff Only: item control page