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Efficient scalable hardware architecture for Montgomery inverse computation in GF(p)

Gutub, A.A.A. and Tenca, A.F. (2003) Efficient scalable hardware architecture for Montgomery inverse computation in GF(p). Signal Processing Systems, 2003. SIPS 2003. IEEE Workshop on, 1.

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The Montgomery inversion is a fundamental computation in several cryptographic applications. We propose a scalable hardware architecture to compute the Montgomery modular inverse in GF(p). We suggest a new correction phase for a previously proposed almost Montgomery inverse algorithm to calculate the inversion in hardware. The intended architecture is scalable, which means that a fixed-area module can handle operands of any size. The word-size, which the module operates, can be selected based on the area and performance requirements. The upper limit on the operand precision is dictated only by the available memory to store the operands and internal results. The scalable module is in principle capable of performing infinite-precision Montgomery inverse computation of an integer, modulo a, prime number. This scalable hardware is compared with a previously proposed fixed (fully parallel) design showing very attractive results.

Item Type:Article
Date:August 2003
Date Type:Publication
Divisions:College Of Computer Sciences and Engineering > Computer Engineering Dept
Creators:Gutub, A.A.A. and Tenca, A.F.
ID Code:14666
Deposited By:KFUPM ePrints Admin
Deposited On:24 Jun 2008 16:44
Last Modified:12 Apr 2011 13:16

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