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Design and analysis of a high-speed sense amplifier forsingle-transistor nonvolatile memory cells

Amin, A.A.M. (1993) Design and analysis of a high-speed sense amplifier forsingle-transistor nonvolatile memory cells. Circuits, Devices and Systems, IEE Proceedings G, 140.

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Abstract

Using a current-sensing scheme and novel circuit techniques, the amplifier achieves sensing speeds equal to or better than those achievable by memory arrays using two transistors per cell. Other circuit techniques were used to improve the circuit-noise immunity as well as sensitivity to critical mask misalignments including the use of output latches, dummy bit lines and decoded odd/even reference-memory-cell selection. The circuit was implemented on a 32 k EPROM memory chip using 1.5 m N-well CMOS process



Item Type:Article
Date:April 1993
Date Type:Publication
Subjects:Computer
Divisions:College Of Engineering Sciences > Chemical Engineering Dept
Creators:Amin, A.A.M.
ID Code:14225
Deposited By:KFUPM ePrints Admin
Deposited On:24 Jun 2008 16:27
Last Modified:12 Apr 2011 13:15

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