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A parallel tabu search algorithm for VLSI standard-cell placement

Suit, S.M. and Youssef, H. and Barada, H.R. and Al-Yamani, A. (2000) A parallel tabu search algorithm for VLSI standard-cell placement. Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on, 2.

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Abstract

VLSI standard-cell placement is an NP-hard problem to which various heuristics have been applied. In this work, tabu search placement algorithm is parallelized on a network of workstations using PVM. The objective of the algorithm is to achieve the best possible solution in terms of interconnection length, overall area of the circuit, and critical path delay (circuit speed). Two parallelization strategies are integrated: functional decomposition strategy and multi-search threads strategy. In addition, domain decomposition strategy is implemented probabilistically. The performance of each strategy is observed and analyzed



Item Type:Article
Date:2000
Date Type:Publication
Subjects:Computer
Divisions:College Of Computer Sciences and Engineering > Computer Engineering Dept
Creators:Suit, S.M. and Youssef, H. and Barada, H.R. and Al-Yamani, A.
ID Code:14201
Deposited By:KFUPM ePrints Admin
Deposited On:24 Jun 2008 16:26
Last Modified:12 Apr 2011 13:14

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