Integrating UAHPL-DA systems with VLSI design tools to support VLSIDA courses

Abstract

A complete operational environment established with the help of state-of-the-art tools, to support courses in design automation (DA) of VLSI circuits, is described. It was accomplished with the integration of two systems: (1) a DA system which automatically produces VLSI layouts of digital systems modeled in Universal Hardware Programming Language (UAHPL); and (2) a set of VLSI tools, which in addition to several other functions can be used for simulation and verification of layout designs. Compared with other approaches, the integrated DA system provides a very simple user interface, fast turnaround time, no restriction on the final structure of the layout, and simulation and verification of all phases of design. The new environment, called UAHPL-based VLSI DA, is excellent for teaching and research at universities