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A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip

El-Maleh, Aiman H. and Al Zahir, Saif and Khan, Esam (2001) A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip. 19’th IEEE VLSI Test Symposium (VTS). pp. 54-59.

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Abstract

The increasing complexity of systems-on-a-chip with the accompanied increase in their test data size has made the need for test data reduction imperative. In this paper, we introduce a novel and very efficient lossless compression technique for testing systems-on-a-chip based on geometric shapes. The technique exploits reordering of test vectors to minimize the number of shapes needed to encode the test data. The effectiveness of the technique in achieving high compression ratio is demonstrated on the largest ISCAS85 and full-scanned versions of ISCAS89 benchmark circuits. In this paper, it is assumed that an embedded core will be used to execute the decompression algorithm and decompress the test data.



Item Type:Article
Date:2001
Date Type:Publication
Subjects:Computer
Divisions:College Of Computer Sciences and Engineering > Computer Engineering Dept
Creators:El-Maleh, Aiman H. and Al Zahir, Saif and Khan, Esam
Email:aimane@kfupm.edu.sa, saif_zahir@yahoo.com, esamkhan@kfupm.edu.sa
ID Code:135
Deposited By:AIMAN HELMI EL-MALEH
Deposited On:26 Feb 2008 15:51
Last Modified:12 Apr 2011 13:06

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