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On the implementation of a very low-spurious Si-Bipolar frequency multiplier

Abuelma’atti, M.T. (2000) On the implementation of a very low-spurious Si-Bipolar frequency multiplier. , Proceedings of the National Science Council, ROC, Part A: Physical Sciences and Engineering, 24 (6). pp. 489-495.

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Abstract

Analytical expressions are obtained for the output components of a Gilbert cell mixer excited by two large signals of equal normalized amplitude and frequency. Assuming identical transistors, no odd-order products are produced by the Gilbert cell mixer. This simplifies the design of the Si-bipolar frequency multiplier proposed by Yamaguchi et al., IEICE Transactions Electronics, 1999, pp. 1092-1097, as no single-end/differential converter is required to convert the sinusoidal input signal into a rectangular waveform. This results in a smaller chip area and less power consumed by the proposed frequency-multiplier built around the Gilbert cell mixer. The effect of the difference in the transistor area and/or bias offset is also considered. SPICE simulation results are included.



Item Type:Article
Date:2000
Date Type:Publication
Subjects:Electrical
Divisions:College Of Engineering Sciences > Electrical Engineering Dept
Creators:Abuelma’atti, M.T.
Email:mtaher@kfupm.edu.sa
ID Code:1328
Deposited By:Obaid-Ur-Rehman Khattak
Deposited On:18 May 2008 10:19
Last Modified:12 Apr 2011 13:08

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