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Scalable VLSI Design for Fast GF(p) Montgomery Inverse Computation

Gutub, Adnan and Savas, Erkay and Kalganova, Tatiana (2006) Scalable VLSI Design for Fast GF(p) Montgomery Inverse Computation. In: IEEE International Conference on Computer & Communication Engineering (ICCCE '06), 9-11 May 2006, Faculty of Engineering, International Islamic University Malaysia, Kuala Lumpur, Malaysia.

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Official URL: http://www.iiu.edu.my/iccce06/program.php

Abstract

This paper accelerates a scalable GF(p) Montgomery inversion hardware. The hardware is made of two parts a memory and a computing unit. We modified the original memory unit to include parallel shifting of all bits which was a task handled by the computing unit. The new hardware modeling, simulating, and synthesizing is performed through VHDL for several 160-bits designs showing interesting speedup to the inverse computation.



Item Type:Conference or Workshop Item (Paper)
Date:11 May 2006
Date Type:Publication
Subjects:Math
Computer
Systems
Electrical
Divisions:College Of Computer Sciences and Engineering > Computer Engineering Dept
Creators:Gutub, Adnan and Savas, Erkay and Kalganova, Tatiana
Email:gutub@kfupm.edu.sa, erkays@sabanciuniv.edu, Tatiana.Kalganova@brunel.ac.uk
ID Code:1290
Deposited By:ADNAN ABDUL-AZIZ M. GUTUB (gutub
Deposited On:17 May 2008 08:33
Last Modified:12 Apr 2011 13:08

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