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Design of a programmable length FIFO memory and its controller.

Kulaib, Munir A. and Beckhoff, Gerhard F. and Sait, Sadiq M. (1988) Design of a programmable length FIFO memory and its controller. International Journal of Electronics, 65 (5). pp. 923-932.

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Abstract

This paper describes the CMOS design of a first-in, first-out (FIFO) memory. The design is based on 2μ. meter CMOS technology and can operate with a 20 MHz clock. The length of the FIFO is programmable, resulting in minimum data ripple through time, for applications not requiring the full length.



Item Type:Article
Date:05 November 1988
Date Type:Publication
Subjects:Electrical
Divisions:College Of Engineering Sciences > Electrical Engineering Dept
Creators:Kulaib, Munir A. and Beckhoff, Gerhard F. and Sait, Sadiq M.
Email:mkulaib@kfupm.edu.sa, UNSPECIFIED, sadiq@kfupm.edu.sa
ID Code:1267
Deposited By:ANKAR (g200603940) (g200603940)
Deposited On:12 May 2008 11:00
Last Modified:12 Apr 2011 13:09

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