Lin, Ta-Cheng and Sait, Sadiq M. and Cyre, W. R. (1998) Performance and Interface Buffer Size Driven Behavioral Partitioning for Embedded Systems. In: 9th International Workshop on Rapid Systems Prototyping, IEEE Computer Society Sponsored, Leuven, Belgium.
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Abstract
One of the major differences in partitioning for codesign is in the way the communication cost is evaluated. Generally the size of the edge cut-set is used. When communication between components is through buffered channels, the size of the edge cut-set is not adequate to estimate the buffer size. A second important factor to measure the quality of partitioning is the system delay. Most partitioning approaches use the number of nodes/functions in each partition as constraints and attempt to minimize the communication cost. The data dependencies among nodes/functions, and their delays are not considered. In this paper we present partitioning with two objectives: (1) buffer size, which is estimated by analyzing the data flow patterns of the CDFG, and solved as a clique partitioning problem, and (2) the system delay that is estimated using List Scheduling. We pose the problem as a combinatorial optimization and use an efficient non-deterministic search algorithm called Problem-Space Genetic Algorithm to search for the optimum. Experimental results indicate that, according to a proposed quality metric, our approach can attain an average 87% of the optimum for two-way partitioning.
| Item Type: | Conference or Workshop Item (Other) |
|---|---|
| Date: | April 1998 |
| Subjects: | Computer |
| Divisions: | College Of Computer Sciences and Engineering > Computer Engineering Dept |
| Creators: | Lin, Ta-Cheng and Sait, Sadiq M. and Cyre, W. R. |
| Email: | UNSPECIFIED, sadiq@kfupm.edu.sa, UNSPECIFIED |
| ID Code: | 120 |
| Deposited By: | AbdulRahman |
| Deposited On: | 26 Feb 2008 08:16 |
| Last Modified: | 12 Apr 2011 13:06 |
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