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Hardware specific optimization on RTL description

Al-Mulhem, Abdulaziz Sultan (1994) Hardware specific optimization on RTL description. Masters thesis, King Fahd University of Petroleum and Minerals.


Arabic Abstract


English Abstract

High-level Synthesis (HLS) refers to the process of translating a high-level specification of the behavior of a digital system into a structural design. The outcome is a netlist of Register Transfer Level (RTL) components, such as ALUs, registers, multiplexers and their interconnections. Because of its complexity, HLS is broken into several steps, where a subset of the overall problem is solved in each step. The steps move the source specification into a target specification, through several intermediate forms (IFs). Due to the ample code generated from BRPN, optimization techniques are exercised diligently on CRTL code. Unlike the traditional compilers optimization techniques used in HLS systems, hardware specific optimization techniques are applied. These techniques utilize hardware specific traits. The major contributions of this work are the introduction of the stack IF in HLS and the exploitation of the hardware specific features in optimizing RTL descriptions.

Item Type:Thesis (Masters)
Date:June 1994
Date Type:Completion
Divisions:College Of Computer Sciences and Engineering > Computer Engineering Dept
Creators:Al-Mulhem, Abdulaziz Sultan
Committee Advisor:Sait, Sadiq M.
Committee Members:Youssef, Habib and Benten, M. S. T.
ID Code:10209
Deposited By:KFUPM ePrints Admin
Deposited On:22 Jun 2008 16:59
Last Modified:26 Apr 2011 07:59

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